UPD78F1502AGK-GAK-AX Datasheet, PDF (688/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 16 LCD CONTROLLER/DRIVER
Figure 16-6. Format of Port Function Register (PFALL) (2/2)
PF5H
0
1
Port/segment outputs specification of the P54 to P57 pins
Used the P54 to P57 pins as port (other than segment output)
Used the P54 to P57 pins as segment output
PF5L
0
1
Port/segment outputs specification of P50 to P53 pins
Used the P50 to P53 pins as port (other than segment output)
Used the P50 to P53 pins as segment output
Caution For 78K0R/LF3, bits 3 and 7 must be set to 0. For 78K0R/LG3 and 78K0R/LH3, bit 7 must be set to 0.
(6) Segment enable register (SEGEN)
SEGEN is a register that is used to enable or disable segment output to segment output only pins.
SEGEN is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets SEGEN to 00H.
Remark The segment output only pins vary, depending on the product.
• 78K0R/LF3: SEG8 to SEG10
• 78K0R/LG3: SEG8 to SEG14
• 78K0R/LH3: SEG8 to SEG26
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011