UPD78F1502AGK-GAK-AX Datasheet, PDF (426/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 10 12-BIT A/D CONVERTER (μ PD78F150xA),
10-BIT A/D CONVERTER (μ PD78F151xA)
The setting methods are described below.
<1> Set bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 1.
<2> Select the conversion time by using bits 5 to 1 (FR2 to FR0, LV1, and LV0) of A/D converter mode register
(ADM), and select the operation mode by using bit 6 (ADSCM) of ADM.
<3> Use bits 7, 3, 1, and 0 (ADREF, VRSEL, VRGV, and VRON) of the analog reference voltage control register
(ADVRC) to specify the reference voltage source of the A/D converter and the operation of the input gate
voltage boost circuit for the A/D converter.
<4> Set bit 0 (ADCE) of ADM to 1.
<5> Set the channel to be used in the analog input mode by using bits 4 to 0 (ADPC4 to ADPC0) of the A/D port
configuration register (ADPC), bits 7 to 0 (PM27 to PM20) of port mode register 2 (PM2), and bits 7, 2 to 0
(PM157, PM152 to PM150) of port mode register 15 (PM15).
<6> Select a channel to be used by using bits 3 to 0 (ADS3 to ADS0) of the analog input channel specification
register (ADS).
<7> Use bits 0 and 7 (ADTRS, ADTMD) of A/D converter mode register 1 (ADM1) to set the trigger mode.
<8> In the software trigger mode
→ Start A/D conversion by setting bit 7 (ADCS) of ADM to 1.
In the timer trigger mode
→ ADCS is automatically set to 1 and A/D conversion starts when the timer trigger signal is generated.
<9> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<10> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<11> In the continuous conversion mode
→ Start the next A/D conversion automatically.
In the single conversion mode
→ ADCS is automatically cleared to 0 and the A/D converter goes on standby. To start A/D conversion
operation, go to step <8>.
<Change the channel>
<12> Change the channel using bits 3 to 0 (ADS3 to ADS0) of ADS to start A/D conversion.^Note
<13> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<14> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<Complete A/D conversion>
<15> Clear ADCS to 0.
<16> In the software trigger mode
→ Clear ADCE to 0.
In the timer trigger mode
→ Clear ADCE and ADTMD to 0.
<17> Clear bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 0.
Note When in timer trigger mode (single conversion mode), the A/D conversion operation is continued even if bits
3 to 0 of ADS are set during A/D conversion. The channel will be changed when the next A/D conversion
operation starts.
When in any other mode, A/D conversion operation is aborted after bits 3 to 0 of ADS have been set, and
A/D conversion operation is started from the beginning after the channel has been changed.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011