UPD78F1502AGK-GAK-AX Datasheet, PDF (225/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
Remark
fX: X1 clock oscillation frequency
fIH: Internal high-speed oscillation clock frequency
fIH1: 1 MHz internal high-speed oscillation clock frequency
fIH8: 8 MHz internal high-speed oscillation clock frequency
fIH20: 20 MHz internal high-speed oscillation clock frequency
fEX: External main system clock frequency
fMX: High-speed system clock frequency
fMAIN: Main system clock frequency
fMAINC: Main system selection clock frequency
fXT: XT1 clock oscillation frequency
fSUB: Subsystem clock frequency
fSUBC: Subsystem selection clock frequency
fCLK: CPU/peripheral hardware clock frequency
fIL: Internal low-speed oscillation clock frequency
5.3 Registers Controlling Clock Generator
The following eight registers are used to control the clock generator.
• Clock operation mode control register (CMC)
• Clock operation status control register (CSC)
• Oscillation stabilization time counter status register (OSTC)
• Oscillation stabilization time select register (OSTS)
• System clock control register (CKC)
• 20 MHz internal high-speed oscillation control register (DSCCTL)
• Peripheral enable register 0 (PER0)
• Operation speed mode control register (OSMC)
(1) Clock operation mode control register (CMC)
This register is used to set the operation mode of the X1/P121, X2/EXCLK/P122, XT1/P123, and XT2/P124 pins, and
to select a gain of the oscillator.
CMC can be written only once by an 8-bit memory manipulation instruction after reset release. This register can be
read by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011