UPD78F1502AGK-GAK-AX Datasheet, PDF (821/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 24 LOW-VOLTAGE DETECTOR
24.2 Configuration of Low-Voltage Detector
The block diagram of the low-voltage detector is shown in Figure 24-1.
Figure 24-1. Block Diagram of Low-Voltage Detector
VDD
VDD
EXLVI/P120/
INTP0
N-ch
+
−
Internal reset signal
INTLVI
Reference
4
voltage
source
LVIS3 LVIS2 LVIS1 LVIS0
Low-voltage detection level
select register (LVIS)
Internal bus
LVION LVISEL LVIMD LVIF
Low-voltage detection register
(LVIM)
24.3 Registers Controlling Low-Voltage Detector
The low-voltage detector is controlled by the following registers.
• Low-voltage detection register (LVIM)
• Low-voltage detection level select register (LVIS)
• Port mode register 12 (PM12)
(1) Low-voltage detection register (LVIM)
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
R01UH0004EJ0501 Rev.5.01
805
Jun 20, 2011