UPD78F1502AGK-GAK-AX Datasheet, PDF (289/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
(c) Start timing in capture mode
<1> Writing 1 to TSpq sets TEpq = 1
<2> The write data to TSpq is held until count clock generation.
<3> TCRpq holds the initial value until count clock generation.
<4> On generation of count clock, 0000H is loaded to TCRpq and count starts.
Figure 6-13. Start Timing (In Capture Mode)
fCLK
TSpq (write)
TEpq ^<1>
Count clock
TSpq (write) hold signal
<2>
Start trigger detection signal
TCRpq
<3>
Initial value
<4>
0000H
INTTMpq
When MDpq0 = 1 is set
Caution In the first cycle operation of count clock after writing TSpq, an error at a maximum of one clock is
generated since count start delays until count clock has been generated. When the information
on count start timing is necessary, an interrupt can be generated at count start by setting MDpq0
= 1.
Remark
pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: pq = 00 to 04, 07
78K0R/LG3: pq = 00 to 07
78K0R/LH3: pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
273
Jun 20, 2011