UPD78F1502AGK-GAK-AX Datasheet, PDF (907/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 31 ELECTRICAL SPECIFICATIONS
<R>
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DC Characteristics (7/11)
(TA = −40 to +85°C, 1.8 V ≤ VDD = EVDD ≤ 5.5 V, 1.8 V ≤ AVDD0 ≤ VDD,
1.8 V ≤ AVDD ≤ VDD, 1.8 V ≤ EVDD1 = VDD, VSS = EVSS = AVSS = 0 V)
1.8 V ≤ AVDD1 ≤ VDD,
Items
Symbol
Conditions
MIN. TYP. MAX. Unit
Input leakage ILIH1
current, high
P00 to P02, P10 to P17, P30 to
P34, P40, P41, P50 to P57, P60,
P61, P70 to P77, P80 to P87,
P90 to P97, P100 to P102, P120,
P140 to P147, FLMD0, RESET
VI = VDD
1
μA
ILIH2
P20 to P27, P150 to P152, P157 VI = AVDD0
(μ PD78F150xA)
1
μA
P20 to P27, P150 to P152, P157 VI = AVDD
(μ PD78F151xA)
1
μA
P110, P111
(μ PD78F150xA)
VI = AVDD1
1
μA
P110, P111
(μ PD78F151xA)
VI = EVDD1
1
μA
ILIH3
P121 to P124
(X1, X2, XT1, XT2)
VI = VDD In input port
In resonator
connection
1
μA
10
μA
Input leakage ILIL1
current, low
P00 to P02, P10 to P17, P30 to
P34, P40, P41, P50 to P57, P60,
P61, P70 to P77, P80 to P87,
P90 to P97, P100 to P102, P120,
P140 to P147, FLMD0, RESET
VI = VSS
−1
μA
ILIL2
P20 to P27, P150 to P152, P157 VI = VSS
−1
μA
P110, P111
VI = VSS
−1
μA
ILIL3
P121 to P124
(X1, X2, XT1, XT2)
VI = VSS In input port
In resonator
connection
−1
μA
−10
μA
On-chip pll-up RU
resistance
P00 to P02, P10 to P17, P30 to
P34, P40, P41, P50 to P57, P70
to P77, P80 to P87, P90 to P97,
P100 to P102, P120, P140 to
P147
VI = VSS, In input port
10
20
100
kΩ
FLMD0 pin
RFLMD0
When enabling the self-programming mode setting with
100
kΩ
external pull-
software
down resistance
Note
Note It is recommended to leave the FLMD0 pin open. If the pin is required to be pulled down externally, set RFLMD0 to
100 kΩ or more.
78K0R/Lx3
microcontrollers
FLMD0 pin
RFLMD0
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins.
R01UH0004EJ0501 Rev.5.01
891
Jun 20, 2011