UPD78F1502AGK-GAK-AX Datasheet, PDF (777/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 19 INTERRUPT FUNCTIONS
Figure 19-11. Format of External Interrupt Rising Edge Enable Registers (EGP0, EGP1) and External Interrupt
Falling Edge Enable Registers (EGN0, EGN1) (78K0R/LF3)
Address: FFF38H After reset: 00H R/W
Symbol
7
6
5
EGP0
EGP7
EGP6
EGP5
4
EGP4
3
EGP3
2
EGP2
1
EGP1
0
EGP0
Address: FFF39H After reset: 00H R/W
Symbol
7
6
5
EGN0
EGN7
EGN6
EGN5
4
EGN4
3
EGN3
2
EGN2
1
EGN1
0
EGN0
EGPn
0
0
1
1
EGNn
0
1
0
1
INTPn pin valid edge selection (n = 0 to 7)
Edge detection disabled
Falling edge
Rising edge
Both rising and falling edges
Figure 19-12. Format of External Interrupt Rising Edge Enable Registers (EGP0, EGP1) and External Interrupt
Falling Edge Enable Registers (EGN0, EGN1) (78K0R/LG3, 78K0R/LH3)
Address: FFF38H After reset: 00H R/W
Symbol
7
6
5
EGP0
EGP7
EGP6
EGP5
4
EGP4
3
EGP3
2
EGP2
1
EGP1
0
EGP0
Address: FFF39H After reset: 00H R/W
Symbol
7
6
5
EGN0
EGN7
EGN6
EGN5
4
EGN4
3
EGN3
2
EGN2
1
EGN1
0
EGN0
Address: FFF3AH After reset: 00H R/W
Symbol
7
6
5
EGP1
0
0
0
4
3
2
1
0
0
EGP11
EGP10
EGP9
EGP8
Address: FFF3BH After reset: 00H R/W
Symbol
7
6
5
EGN1
0
0
0
4
3
2
1
0
0
EGN11
EGN10
EGN9
EGN8
EGPn
0
0
1
1
EGNn
0
1
0
1
INTPn pin valid edge selection (n = 0 to 11)
Edge detection disabled
Falling edge
Rising edge
Both rising and falling edges
Table 19-3 shows the ports corresponding to EGPn and EGNn.
R01UH0004EJ0501 Rev.5.01
761
Jun 20, 2011