HD6432351 Datasheet, PDF (976/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Table D-1 I/O Port States in Each Processing State (H8S/2351) (cont)
MCU
Port Name Operating
Pin Name Mode
Port C
1, 4, 5
Power-
On
Manual
Reset Reset
L
kept
2, 6
T
kept
Hardware Software
Standby Standby
Mode Mode
Bus
Release
State
T
[OPE = 0]
T
T
[OPE = 1]
kept
T
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
kept
Port D
Port E
PF₇/ø
3, 7
T
kept
T
1, 2, 4 to 6 T
T*
T
3, 7
T
kept
T
1, 2, 8 bit T
kept
T
4 to 6 bus
16 bit T
T*
T
bus
3, 7
T
kept
T
1, 2, 4 to 6 Clock [DDR = 0] T
output T
[DDR = 1]
Clock
output
3, 7
T
kept
T
PF₆/AS
1, 2, 4 to 6 H
H*
T
PF₅/RD
PF₄/HWR
PF₃/LWR
3, 7
T
kept
T
kept
T
kept
kept
T
kept
[DDR = 0]
Input port
[DDR = 1]
H
[DDR = 0]
Input port
[DDR = 1]
H
[OPE = 0]
T
[OPE = 1]
H
kept
kept
T
kept
kept
T
kept
[DDR = 0]
Input port
[DDR = 1]
Clock
output
[DDR = 0]
Input port
[DDR = 1]
Clock
output
T
kept
Program
Execution
State
Sleep Mode
Address
output
[DDR = 0]
Input port
[DDR = 1]
Address
output
I/O port
Data bus
I/O port
I/O port
Data bus
I/O port
[DDR = 0]
Input port
[DDR = 1]
Clock
output
[DDR = 0]
Input port
[DDR = 1]
Clock
output
AS, RD,
HWR, LWR
I/O port
956