HD6432351 Datasheet, PDF (860/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Full address mode (cont)
Bit
:
7
DMABCRL : DTME1
Initial value :
0
Read/Write : R/W
6
DTE1
0
R/W
5
DTME0
0
R/W
4
DTE0
0
R/W
3
2
1
0
DTIE1B DTIE1A DTIE0B DTIE0A
0
0
0
0
R/W
R/W
R/W
R/W
Channel 0 Data Transfer
Interrupt Enable A
0 Transfer end interrupt disabled
1 Transfer end interrupt enabled
Channel 0 Data Transfer Interrupt
Enable B
0 Transfer suspended interrupt disabled
1 Transfer suspended interrupt enabled
Channel 0 Data Transfer
Interrupt Enable A
0 Transfer end interrupt disabled
1 Transfer end interrupt enabled
Channel 1 Data Transfer Interrupt
Enable B
0 Transfer suspended interrupt disabled
1 Transfer suspended interrupt enabled
Channel 0 Data Transfer Enable
0 Data transfer disabled
1 Data transfer enabled
Channel 0 Data Transfer Master Enable
0 Data transfer disabled. In normal mode,
cleared to 0 by an NMI interrupt
1 Data transfer enabled
Channel 1 Data Transfer Enable
0 Data transfer disabled
1 Data transfer enabled
Channel 0 Data Transfer Master Enable
0 Data transfer disabled. In normal mode,
cleared to 0 by an NMI interrupt
1 Data transfer enabled
(Continued on next page)
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