HD6432351 Datasheet, PDF (533/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

11.4 Usage Notes
Operation of Pulse Output Pins: Pins PO0 to PO15 are also used for other peripheral functions
such as the TPU. When output by another peripheral function is enabled, the corresponding pins
cannot be used for pulse output. Note, however, that data transfer from NDR bits to PODR bits
takes place, regardless of the usage of the pins.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
Note on Non-Overlapping Output: During non-overlapping operation, the transfer of NDR bit
values to PODR bits takes place as follows.
• NDR bits are always transferred to PODR bits at compare match A.
• At compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
if their value is 1.
Figure 11-10 illustrates the non-overlapping pulse output operation.
Pulse
output
pin
DDR
NDER
Q
C
Q PODR D
Normal output/inverted output
Compare match A
Compare match B
Q NDR D
Internal data bus
Figure 11-10 Non-Overlapping Pulse Output
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