HD6432351 Datasheet, PDF (379/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Port A MOS Pull-Up Control Register (PAPCR) [H8S/2351 Only]
Bit
:
Initial value :
R/W
:
7
6
5
4
3
2
1
0
PA7PCR PA6PCR PA5PCR PA4PCR PA3PCR PA2PCR PA1PCR PA0PCR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PAPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port A on an individual bit basis.
All the bits are valid in modes 1, 2, 3, 6, and 7, and bits 7 to 5 are valid in modes 4 and 5. When a
PADDR bit is cleared to 0 (input port setting), setting the corresponding PAPCR bit to 1 turns on
the MOS input pull-up for the corresponding pin.
PAPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode.
Port A Open Drain Control Register (PAODR) [H8S/2351 Only]
Bit
:
7
6
5
4
3
2
1
0
PA7ODR PA6ODR PA5ODR PA4ODR PA3ODR PA2ODR PA1ODR PA0ODR
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PAODR is an 8-bit readable/writable register that controls whether PMOS is on or off for each
port A pin (PA₇ to PA₀).
All bits are valid in modes 1, 2, 3, and 7.
Setting a PAODR bit to 1 makes the corresponding port A pin an NMOS open-drain output, while
clearing the bit to 0 makes the pin a CMOS output.
PAODR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode.
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