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HD6432351 Datasheet, PDF (683/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise
Table 19-4 External Clock Input Conditions
VCC = 2.7 V VCC = 5.0 V ±
to 5.5 V
10%
Item
Test
Symbol Min Max Min Max Unit Conditions
External clock input
t EXL
low pulse width
40 — 20 — ns Figure 19-6
External clock input
t EXH
high pulse width
40 — 20 — ns
External clock rise time tEXr
External clock fall time tEXf
Clock low pulse width tCL
level
— 10 — 5 ns
— 10 — 5 ns
0.4 0.6 0.4 0.6 tcyc
80 — 80 — ns
ø ≥ 5 MHz Figure 21-4
ø < 5 MHz
Clock high pulse width tCH
level
0.4 0.6 0.4 0.6 tcyc
80 — 80 — ns
ø ≥ 5 MHz
ø < 5 MHz
EXTAL
tEXH
tEXL
VCC × 0.5
tEXr
tEXf
Figure 19-6 External Clock Input Timing
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