HD6432351 Datasheet, PDF (948/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Reset
R
Q
D
P6nDDR
C
WDDR6
Mode 1/2*/3*/7*
Reset
R
P6_n
Q
D
P6nDR
Mode 4/5/6*
C
WDR6
Bus controller
Chip select
RDR6
RPOR6
Legend
WDDR6 : Write to P6DDR
WDR6 : Write to P6DR
RDR6 : Read P6DR
RPOR6 : Read port 6
n = 6 or 7
Note: * Modes 2, 3, 6, and 7 only apply to the H8S/2351.
Interrupt controller
IRQ interrupt input
Figure C-6 (f) Port 6 Block Diagram (Pins P6₆ and P6₇)
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