HD6432351 Datasheet, PDF (25/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

1.2 Block Diagram
Figure 1-1 shows an internal block diagram of the H8S/2350 Series.
MD₂
MD₁
MD₀
EXTAL
XTAL
STBY
RES
WDTOVF
NMI
PF₇/ ø
PF₆/ AS
PF₅/ RD
PF₄/ HWR
PF₃/ LWR
Port
F
PF₂/ WAIT / LCAS/ BREQO
PF₁/ BACK
PF₀/ BREQ
PG₄/ CS0
PG₃/ CS1
Port
PG₂/ CS2
G
PG₁/ CS3
PG₀/ CAS
P6₇/ CS7/ IRQ3
P6₆/ CS6/ IRQ2
P6₅/ IRQ1
P6₄/ IRQ0
Port
P6₃/ TEND1
6
P6₂/ DREQ1
P6₁/ TEND0/ CS5
P6₀/ DREQ0/ CS4
Port D
Port E
H8S/2000 CPU
Interrupt controller
ROM*
DTC
DMAC
RAM
TPU
PPG
WDT
SCI
D/A converter
A/D converter
Port 1
Port 2
Port 4
PA₇/ A₂₃/ IRQ7
PA₆/ A₂₂/ IRQ6
PA₅/ A₂₁/ IRQ5
Port
PA₄/ A₂₀/ IRQ4
A
PA₃/ A₁₉
PA₂/ A₁₈
PA₁/ A₁₇
PA₀/ A₁₆
PB₇/ A₁₅
PB₆/ A₁₄
PB₅/ A₁₃
Port
PB₄/ A₁₂
B
PB₃ / A₁₁
PB₂/ A₁₀
PB₁/ A₉
PB₀/ A₈
PC₇/ A₇
PC₆/ A₆
PC₅/ A₅
Port
PC₄/ A₄
C
PC₃/ A₃
PC₂/ A₂
PC₁/ A₁
PC₀/ A₀
P3₅/ SCK1
P3₄/ SCK0
Port
P3₃/ RxD1
3
P3₂/ RxD0
P3₁/ TxD1
P3₀/ TxD0
P5₀
Port
P5₁
5
P5₂
P5₃/ ADTRG
Note: * Only applies to the H8S/2351.
Figure 1-1 Block Diagram
5