HD6432351 Datasheet, PDF (138/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Table 5-12 Interrupt Source Selection and Clearing Control
Settings
DMAC
DTC
Interrupt Source Selection/Clearing Control
DTA
DTCE
DISEL
DMAC
DTC
CPU
0
0
*
X
∆
1
0
∆
X
1
∆
1
*
*
∆
X
X
Legend
∆ : The relevant interrupt is used. Interrupt source clearing is performed.
(The CPU should clear the source flag in the interrupt handling routine.)
: The relevant interrupt is used. The interrupt source is not cleared.
X : The relevant bit cannot be used.
* : Don't care
(4) Notes on Use: SCI and A/D converter interrupt sources are cleared when the DMAC or DTC
reads or writes to the prescribed register, and are not dependent upon the DTA bit or DISEL bit.
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