HD6432351 Datasheet, PDF (94/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

3.3.5 Mode 5
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A, B and C function as an address bus, port D function as a data bus, and part of port F
carries bus control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, note that if at
least one area is designated for 16-bit access by the bus controller, the bus mode switches to 16
bits and port E becomes a data bus.
3.3.6 Mode 6 (H8S/2351 Only)
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
Ports A, B and C function as input ports immediately after a reset. They can each be set to output
addresses by setting the corresponding bits in the data direction register (DDR) to 1. Port D
functions as a data bus, and part of port F carries bus control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, note that if at
least one area is designated for 16 bit access by the bus controller, the bus mode switches to 16
bits and port E becomes a data bus.
3.3.7 Mode 7 (H8S/2351 Only)
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled,
but external addresses cannot be accessed.
All I/O ports are available for use as input-output ports.
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