HD6432351 Datasheet, PDF (678/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

19.1.2 Register Configuration
The clock pulse generator is controlled by SCKCR. Table 19-1 shows the register configuration.
Table 19-1 Clock Pulse Generator Register
Name
Abbreviation R/W
System clock control register
SCKCR
R/W
Note:* Lower 16 bits of the address.
Initial Value
H'00
Address*
H'FF3A
658