HD6432351 Datasheet, PDF (178/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

6.4.5 Wait Control
When accessing external space, the H8S/2350 Series can extend the bus cycle by inserting one or
more wait states (T_w). There are two ways of inserting wait states: program wait insertion and pin
wait insertion using the WAIT pin.
Program Wait Insertion
From 0 to 3 wait states can be inserted automatically between the T₂ state and T₃ state on an
individual area basis in 3-state access space, according to the settings of WCRH and WCRL.
Pin Wait Insertion
Setting the WAITE bit in BCRL to 1 enables wait insertion by means of the WAIT pin. Program
wait insertion is first carried out according to the settings in WCRH and WCRL. Then , if the
WAIT pin is low at the falling edge of ø in the last T₂ or T_w state, a T_w state is inserted. If the
WAIT pin is held low, T_w states are inserted until it goes high.
This is useful when inserting four or more T_w states, or when changing the number of T_w states for
different external devices.
The WAITE bit setting applies to all areas.
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