HD6432351 Datasheet, PDF (20/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Appendix C I/O Port Block Diagrams........................................................................... 913
C.1 Port 1 Block Diagram ........................................................................................................ 913
C.2 Port 2 Block Diagram ........................................................................................................ 916
C.3 Port 3 Block Diagram ........................................................................................................ 917
C.4 Port 4 Block Diagram ........................................................................................................ 920
C.5 Port 5 Block Diagram ........................................................................................................ 921
C.6 Port 6 Block Diagram ........................................................................................................ 923
C.7 Port A Block Diagram........................................................................................................ 929
C.8 Port B Block Diagram........................................................................................................ 935
C.9 Port C Block Diagram........................................................................................................ 937
C.10 Port D Block Diagram........................................................................................................ 939
C.11 Port E Block Diagram........................................................................................................ 941
C.12 Port F Block Diagram ........................................................................................................ 943
C.13 Port G Block Diagram........................................................................................................ 951
Appendix D Pin States........................................................................................................ 955
D.1 Port States in Each Mode [H8S/2351] ............................................................................... 955
D.2 Port States in Each Mode [H8S/2350] ............................................................................... 959
Appendix E Pin States at Power-On .............................................................................. 962
E.1 When Pins Settle from an Indeterminate State at Power-On ............................................. 962
E.2 When Pins Settle from the High-Impedance State at Power-On ....................................... 963
Appendix F Timing of Transition to and Recovery from Hardware
Standby Mode............................................................................................... 964
Appendix G Product Code Lineup.................................................................................. 965
Appendix H Package Dimensions................................................................................... 966
xiv