HD6432351 Datasheet, PDF (532/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

11.3.6 Pulse Output Triggered by Input Capture
Pulse output can be triggered by TPU input capture as well as by compare match. If TGRA
functions as an input capture register in the TPU channel selected by PCR, pulse output will be
triggered by the input capture signal.
Figure 11-9 shows the timing of this output.
ø
TIOC pin
Input capture
signal
NDR
PODR
PO
N
M
N
M
N
Figure 11-9 Pulse Output Triggered by Input Capture (Example)
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