HD6432351 Datasheet, PDF (95/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

3.4 Pin Functions in Each Operating Mode
The pin functions of ports A to F vary depending on the operating mode. Table 3-4 shows their
functions in each operating mode.
Table 3-4 Pin Functions in Each Mode
Port
Mode 1 Mode 2*² Mode 3*² Mode 4
Port A PA₇ to PA₅ P
PA₄ to PA₀
Port B
A
P
P
P*¹/A P
P*¹/A
A
A
Port C
A
P*¹/A P
A
Port D
D
D
P
D
Port E
P*¹/D P*¹/D P
P/D*¹
Port F PF₇
P/C*¹
P/C*¹
PF₆ to PF₃ C
C
PF₂ to PF₀ P*¹/C
P*¹/C
Legend
P: I/O port
A: Address bus output
D: Data bus I/O
C: Control signals, clock I/O
*1: After reset
*2: Only applies to the H8S/2351
P*¹/C
P
P/C*¹
C
P*¹/C
Mode 5
P*¹/A
A
A
A
D
P*¹/D
P/C*¹
C
P*¹/C
Mode 6*² Mode 7*²
P*¹/A P
P*¹/A
P*¹/A
D
P*¹/D
P/C*¹
C
P*¹/C
P
P
P
P
P*¹/C
P
3.5 Memory Map in Each Operating Mode
Figure 3-1 shows a memory map for each of the operating modes.
The address space is 64 kbytes in modes 1 to 3 (normal modes), and 16 Mbytes in modes 4 to 7
(advanced modes).
The H8S/2351’s on-chip ROM contains 64 kbytes, but only 56 kbytes are available in modes 2
and 3 (normal modes).
The address space is divided into eight areas for modes 4 to 7. For details, see section 6, Bus
Controller.
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