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| HD6432351 Datasheet, PDF (728/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise | |||
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SCK0, SCK1
tTXD
TxD0, TxD1
(transmit data)
RxD0, RxD1
(receive data)
tRXS tRXH
Figure 21-28 SCI Input/Output Timing (Clock Synchronous Mode)
ø
ADTRG
tTRGS
Figure 21-29 A/D Converter External Trigger Input Timing
708
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