HD6432351 Datasheet, PDF (971/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

C.13 Port G Block Diagram
Reset
R
Q
D
PG0DDR
C
WDDRG
Reset
R
PG₀
Q
D
PG0DR
C
WDRG
Mode 4/5/6*
RDRG
Bus controller
CAS enable
CAS output
RPORG
Legend
WDDRG : Write to PGDDR
WDRG : Write to PGDR
RDRG : Read PGDR
RPORG : Read port G
Note: Mode 6 only applies to the H8S/2351.
Figure C-13 (a) Port G Block Diagram (Pin PG₀)
951