HD6432351 Datasheet, PDF (970/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Mode
1/2^*2/4/5/6^*2 Reset
S^*1 R
Q
D
PF7DDR
C
WDDRF
Reset
R
PF₇
Q
D
PF7DR
C
WDRF
ø
RDRF
RPORF
Legend
WDDRF : Write to PFDDR
WDRF : Write to PFDR
RDRF : Read PFDR
RPORF : Read port F
Notes: 1. Set priority
2. Modes 2 and 6 only apply to the H8S/2351.
Figure C-12 (h) Port F Block Diagram (Pin PF₇)
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