|
HD6432351 Datasheet, PDF (870/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise | |||
|
◁ |
MDCRâMode Control Register
Bit
:
7
â
Initial value :
1
Read/Write : â
6
5
â
â
0
0
â
â
Note: * Determined by pins MD2 to MD0
H'FF3B
MCU
4
3
2
1
0
â
â MDS2 MDS1 MDS0
0
0
â*
â*
â*
â
â
R
R
R
Current mode pin operating mode
MSTPCRH â Module Stop Control Register H H'FF3C
MSTPCRL â Module Stop Control Register L H'FF3D
Power-Down State
Power-Down State
MSTPCRH
MSTPCRL
Bit
: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Read/Write : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Specifies module stop mode
0 Module stop mode cleared
1 Module stop mode set
Reserved Register
H'FF44
Bit
:
7
6
5
4
3
2
1
0
â
â
â
â
â
â
â
â
Initial value :
0
0
0
0
0
0
0
0
Read/Write : â
â
R/W
â
â
â
â
â
Reserved
Only 0 should be written to these bits
850
|
▷ |