HD6432351 Datasheet, PDF (954/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

H8S/2350
*
PA_n
Mode 1
Mode 4/5
Reset
R
Q
D
PAnDDR
C
WDDRA
Reset
R
Q
D
PAnDR
C
WDRA
RDRA
Legend
WDDRA : Write to PADDR
WDRA : Write to PADR
RDRA : Read PADR
RPORA : Read port A
n = 5 to 7
Note: * Output enable signal
RPORA
Interrupt
controller
IRQ interrupt
input
Figure C-7 (c-2) H8S/2350 Port A Block Diagram (Pins PA₅ to PA₇)
934