HD6432351 Datasheet, PDF (975/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Appendix D Pin States
D.1 Port States in Each Mode [H8S/2351]
Table D-1 I/O Port States in Each Processing State (H8S/2351)
MCU
Port Name Operating
Pin Name Mode
Port 1
1 to 7
Port 2
1 to 7
Port 3
1 to 7
Port 4
1 to 7
Port 5
1 to 7
P6₅ to P6₂
P6₇/CS7
P6₆/CS6
P6₁/CS5
P6₀/CS4
1 to 7
1 to 3, 7
4 to 6
Power-
On
Manual
Reset Reset
T
kept
T
kept
T
kept
T
T
T
kept
T
kept
T
kept
T
kept
Port A
1 to 3, 7
T
kept
4, 5
L
kept
6
T
kept
Port B
1, 4, 5
L
kept
2, 6
T
kept
3, 7
T
kept
Hardware Software
Standby Standby
Mode Mode
Bus
Release
State
T
kept
kept
T
kept
kept
T
kept
kept
T
T
T
T
kept
kept
T
kept
kept
T
kept
kept
T
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
H
T
kept
kept
T
[OPE = 0]
T
T
[OPE = 1]
kept
T
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
kept
T
[OPE = 0]
T
T
[OPE = 1]
kept
T
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
kept
T
kept
kept
Program
Execution
State
Sleep Mode
I/O port
I/O port
I/O port
Input port
I/O port
I/O port
I/O port
[DDR = 0]
Input port
[DDR = 1]
CS7 to CS4
I/O port
Address
output
[DDR = 0]
Input port
[DDR = 1]
Address
output
Address
output
[DDR = 0]
Input port
[DDR = 1]
Address
output
I/O port
955