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HD6432351 Datasheet, PDF (359/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise
Table 9-5 Port 2 Pin Functions (cont)
Pin
Selection Method and Pin Functions
P21/PO1/TIOCB3
The pin function is switched as shown below according to the combination of
the TPU channel 3 setting by bits MD3 to MD0 in TMDR3, bits IOB3 to IOB0 in
TIOR3H, bits CCLR2 to CCLR0 in TCR3, bit NDER1 in NDERL, and bit
P21DDR.
TPU Channel
3 Setting
Table Below (1)
Table Below (2)
P21DDR
—
0
1
1
NDER1
—
—
0
1
Pin function
TIOCB3 output
P21
input
P21
output
PO1
output
TIOCB3 input *1
Note: 1. TIOCB3 input when MD3 to MD0 = B'0000, and IOB3 to IOB0 =
B'10xx.
TPU Channel
3 Setting
MD3 to MD0
IOB3 to IOB0
CCLR2 to
CCLR0
Output
function
(2)
(1)
(2)
B'0000
B'0010
B'0000 B'0001 to —
B'0100 B'0011
B'1xxx B'0101 to
B'0111
—
—
—
—
Output
—
compare
output
(2)
B'xx00
—
—
(1)
(2)
B'0011
Other than B'xx00
Other
than
B'010
B'010
PWM
—
mode 2
output
x: Don’t care
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