HD6432351 Datasheet, PDF(349/989 Page) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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HD6432351 Datasheet, PDF (349/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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Table 9-3 Port 1 Pin Functions (cont)

Pin

Selection Method and Pin Functions

P10/PO8/TIOCA0/

DACK0

The pin function is switched as shown below according to the combination of

the TPU channel 0 setting by bits MD3 to MD0 in TMDR0, bits IOA3 to IOA0 in

TIOR0H, bits CCLR2 to CCLR0 in TCR0, bit NDER8 in NDERH, bit SAE0 in

DMABCRH, and bit P10DDR.

SAE0

0

1

TPU Channel Table

0 Setting

Below (1)

Table Below (2)

â

P10DDR

â

0

1

1

â

NDER8

â

â

0

1

â

Pin function

TIOCA0

output

P10

input

P10

output

PO8

output

DACK0

output

TIOCA0 input *1

Note: 1. TIOCA0 input when MD3 to MD0 = B'0000, and IOA3 to IOA0 =

B'10xx.

TPU Channel

0 Setting

MD3 to MD0

IOA3 to IOA0

CCLR2 to

CCLR0

(2)

(1)

(2)

B'0000

B'001x

B'0000

B'0100

B'1xxx

B'0001 to

B'0011

B'0101 to

B'0111

B'xx00

â

â

â

Output

function

â

Output

â

compare

output

Note: 2. TIOCB0 output is disabled.

(1)

(1)

(2)

B'0010

B'0011

Other than B'xx00

â

PWM

mode 1

output*2

Other

than

B'001

B'001

PWM

â

mode 2

output

x: Donât care

329

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