HD6432351 Datasheet, PDF(613/989 Page) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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HD6432351 Datasheet, PDF (613/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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Section 14 Smart Card Interface

14.1 Overview

SCI supports an IC card (Smart Card) interface conforming to ISO/IEC 7816-3 (Identification

Card) as a serial communication interface extension function.

Switching between the normal serial communication interface and the Smart Card interface is

carried out by means of a register setting.

14.1.1 Features

Features of the Smart Card interface supported by the H8S/2357 are as follows.

â¢ Asynchronous mode

ï£§ Data length: 8 bits

ï£§ Parity bit generation and checking

ï£§ Transmission of error signal (parity error) in receive mode

ï£§ Error signal detection and automatic data retransmission in transmit mode

ï£§ Direct convention and inverse convention both supported

â¢ On-chip baud rate generator allows any bit rate to be selected

â¢ Three interrupt sources

ï£§ Three interrupt sources (transmit data empty, receive data full, and transmit/receive error)

that can issue requests independently

ï£§ The transmit data empty interrupt and receive data full interrupt can activate the DMA

controller (DMAC) or data transfer controller (DTC) to execute data transfer

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