HD6432351 Datasheet, PDF (342/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

9.2.3 Pin Functions
Port 1 pins also function as PPG output pins (PO15 to PO8), TPU I/O pins (TCLKA, TCLKB,
TCLKC, TCLKD, TIOCA0, TIOCB0, TIOCC0, TIOCD0, TIOCA1, TIOCB1, TIOCA2, and
TIOCB2), and DMAC output pins (DACK0 and DACK1). Port 1 pin functions are shown in table
9-3.
Table 9-3 Port 1 Pin Functions
Pin
Selection Method and Pin Functions
P1₇/PO15/TIOCB2/ The pin function is switched as shown below according to the combination of
TCLKD
the TPU channel 2 setting by bits MD3 to MD0 in TMDR2, bits IOB3 to IOB0 in
TIOR2, bits CCLR1 and CCLR0 in TCR2, bits TPSC2 to TPSC0 in TCR0 and
TCR5, bit NDER15 in NDERH, and bit P17DDR.
TPU Channel
2 Setting
Table Below (1)
Table Below (2)
P17DDR
—
0
1
1
NDER15
—
—
0
1
Pin function
TIOCB2 output
P1₇
input
P1₇
output
PO15
output
TIOCB2 input *¹
TCLKD input *²
Notes: 1. TIOCB2 input when MD3 to MD0 = B'0000, B'01xx, and IOB3 = 1.
2. TCLKD input when the setting for either TCR0 or TCR5 is: TPSC2
to TPSC0 = B'111.
TCLKD input when channels 2 and 4 are set to phase counting
mode.
TPU Channel
2 Setting
(2)
(1)
(2)
(2)
(1)
(2)
MD3 to MD0
B'0000, B'01xx B'0010
B'0011
IOB3 to IOB0 B'0000 B'0001 to —
B'0100 ^B'0011
B'1xxx ^{B'0101 to}
B'0111
B'xx00 Other than B'xx00
CCLR1,
CCLR0
—
—
—
—
Other B'10
than B'10
Output
function
—
Output
—
compare
output
—
PWM
—
mode 2
output
x: Don’t care
322