HD6432351 Datasheet, PDF (91/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

The H8S/2351 can be used only in modes 1 to 7. This means that the mode pins must be set to
select one of these modes. Do not change the inputs at the mode pins during operation.
3.1.3 Register Configuration
The H8S/2350 Series has a mode control register (MDCR) that indicates the inputs at the mode
pins (MD₂ to MD₀), and a system control register (SYSCR) that controls the operation of the
H8S/2350 Series. Table 3-3 summarizes these registers.
Table 3-3 MCU Registers
Name
Abbreviation
R/W
Mode control register
MDCR
R
System control register
SYSCR
R/W
Note: * Lower 16 bits of the address.
Initial Value
Undetermined
H'01
Address*
H'FF3B
H'FF39
3.2 Register Descriptions
3.2.1 Mode Control Register (MDCR)
Bit
:
7
6
5
4
—
—
—
—
Initial value:
1
0
0
0
R/W
:
—
—
—
—
3
2
1
0
— MDS2 MDS1 MDS0
0
—*
—*
—*
—
R
R
R
Note: * Determined by pins MD₂ to MD₀.
MDCR is an 8-bit read-only register that indicates the current operating mode of the H8S/2350
Series.
Bit 7—Reserved: Read-only bit, always read as 1.
Bits 6 to 3—Reserved: Read-only bits, always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins
MD₂ to MD₀ (the current operating mode). Bits MDS2 to MDS0 correspond to MD₂ to MD₀.
MDS2 to MDS0 are read-only bits, they cannot be written to. The mode pin (MD₂ to MD₀) input
levels are latched into these bits when MDCR is read. These latches are canceled by a power-on
reset, but are retained after a manual reset.
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