HD6432351 Datasheet, PDF (466/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

• Example of input capture operation
Figure 10-13 shows an example of input capture operation.
In this example both rising and falling edges have been selected as the TIOCA pin input
capture input edge, falling edge has been selected as the TIOCB pin input capture input edge,
and counter clearing by TGRB input capture has been designated for TCNT.
TCNT value
H'0180
H'0160
Counter cleared by TIOCB
input (falling edge)
H'0010
H'0005
H'0000
TIOCA
TGRA
TIOCB
TGRB
Time
H'0005
H'0160
H'0010
H'0180
Figure 10-13 Example of Input Capture Operation
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