HD6432351 Datasheet, PDF (936/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

C.2 Port 2 Block Diagram
P2_n
*
Reset
R
Q
D
P2nDDR
C
WDDR2
Reset
R
Q
D
P2nDR
C
WDR2
RDR2
PPG module
Pulse output enable
Pulse output
TPU module
Output compare output/
PWM output enable
Output compare output/
PWM output
RPOR2
Legend
WDDR2 : Write to P2DDR
WDR2 : Write to P2DR
RDR2 : Read P2DR
RPOR2 : Read port 2
n = 0 to 7
Input capture input
Note: * Priority order: Output compare output/PWM output > pulse output > DR output
Figure C-2 Port 2 Block Diagram (Pin P2_n)
916