HD6432351 Datasheet, PDF (730/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

21.5 D/A Convervion Characteristics
Table 21-10 lists the D/A conversion characteristics
Table 21-10 D/A Conversion Characteristics
Condition A: V_CC = AV_CC = 2.7 V to 5.5 V, V_ref = 2.7 V to AV_CC, V_SS = AV_SS = 0 V,
ø = 2 to 10 MHz, T_a = –20 to +75°C (regular specifications),
T_a = –40 to +85°C (wide-range specifications)
Condition B: V_CC = AV_CC = 5.0 V ± 10%, V_ref = 4.5 V to AV_CC, V_SS = AV_SS = 0 V,
ø = 2 to 20 MHz, T_a = –20 to +75°C (regular specifications),
T_a = –40 to +85°C (wide-range specifications)
Item
Resolution
Conversion time
Absolute accuracy
Condition A
Condition B
Min Typ Max Min Typ Max Unit Test Conditions
8
8
8
8
8
8
bit
— — 10 — — 10 µs 20-pF capacitive
load
— ±2.0 ±3.0 — ±1.0 ±1.5 LSB 2-MΩ resistive load
— — ±2.0 — — ±1.0 LSB 4-MΩ resistive load
21.6 Usage Note
Although both the ZTAT and mask ROM versions fully meet the electrical specifications listed in
this manual, due to differences in the fabrication process, the on-chip ROM, and the layout
patterns, there will be differences in the actual values of the electrical characteristics, the operating
margins, the noise margins, and other aspects.
Therefore, if a system is evaluated using the ZTAT version, a similar evaluation should also be
performed using the mask ROM version.
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