HD6432351 Datasheet, PDF (419/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Table 10-1 TPU Functions
Item
Count clock
General registers
General registers/
buffer registers
I/O pins
Counter clear
function
Compare 0 output
match
output
1 output
Toggle
output
Input capture
function
Synchronous
operation
PWM mode
Phase counting
mode
Buffer operation
Legend
: Possible
— : Not possible
Channel 0 Channel 1 Channel 2 Channel 3 Channel 4 Channel 5
ø/1
ø/4
ø/16
ø/64
TCLKA
TCLKB
TCLKC
TCLKD
ø/1
ø/4
ø/16
ø/64
ø/256
TCLKA
TCLKB
ø/1
ø/4
ø/16
ø/64
ø/1024
TCLKA
TCLKB
TCLKC
ø/1
ø/4
ø/16
ø/64
ø/256
ø/1024
ø/4096
TCLKA
ø/1
ø/4
ø/16
ø/64
ø/1024
TCLKA
TCLKC
ø/1
ø/4
ø/16
ø/64
ø/256
TCLKA
TCLKC
TCLKD
TGR0A
TGR0B
TGR1A
TGR1B
TGR2A
TGR2B
TGR3A
TGR3B
TGR4A
TGR4B
TGR5A
TGR5B
TGR0C —
—
TGR3C —
—
TGR0D
TGR3D
TIOCA0
TIOCB0
TIOCC0
TIOCD0
TIOCA1
TIOCB1
TIOCA2
TIOCB2
TIOCA3
TIOCB3
TIOCC3
TIOCD3
TIOCA4
TIOCB4
TIOCA5
TIOCB5
TGR
compare
match or
input
capture
TGR
compare
match or
input
capture
TGR
compare
match or
input
capture
TGR
compare
match or
input
capture
TGR
compare
match or
input
capture
TGR
compare
match or
input
capture
—
—
—
—
—
—
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