HD6432351 Datasheet, PDF (952/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

H8S/2350
*1
PA₄
Mode 1
Mode 4/5
Mode
4/5*² Reset
SR
Q
D
PA4DDR
C
WDDRA
Reset
R
Q
D
PA4DR
C
WDRA
RDRA
Legend
WDDRA : Write to PADDR
WDRA : Write to PADR
RDRA : Read PADR
RPORA : Read port A
Notes: 1. Output enable signal
2. Set priority
RPORA
Interrupt
controller
IRQ interrupt
input
Figure C-7 (b-2) H8S/2350 Port A Block Diagram (Pin PA₄)
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