HD6432351 Datasheet, PDF (661/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Digital output
Full-scale error
Ideal A/D conversion
characteristic
Nonlinearity
error
Actual A/D conversion
characteristic
Offset error
FS
Analog
input voltage
Figure 15-10 A/D Conversion Precision Definitions (2)
Permissible Signal Source Impedance: H8S/2350 Series analog input is designed so that
conversion precision is guaranteed for an input signal for which the signal source impedance is 10
kΩ or less. This specification is provided to enable the A/D converter's sample-and-hold circuit
input capacitance to be charged within the sampling time; if the sensor output impedance exceeds
10 kΩ, charging may be insufficient and it may not be possible to guarantee the A/D conversion
precision.
However, if a large capacitance is provided externally, the input load will essentially comprise
only the internal input resistance of 10 kΩ, and the signal source impedance is ignored.
However, since a low-pass filter effect is obtained in this case, it may not be possible to follow an
analog signal with a large differential coefficient (e.g., 5 mV/µs or greater).
When converting a high-speed analog signal, a low-impedance buffer should be inserted.
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