HD6432351 Datasheet, PDF (855/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

DMATCR—DMA Terminal Control Register H'FF01
Bit
:
7
6
5
4
3
2
1
DMATCR :
—
—
TEE1 TEE0
—
—
—
Initial value :
0
0
0
0
0
0
0
Read/Write :
—
—
R/W R/W
—
—
—
Transfer End Enable 0
0 TEND0 pin output disabled
1 TEND0 pin output enabled
Transfer End Enable 1
0 TEND1 pin output disabled
1 TEND1 pin output enabled
DMAC
0
—
0
—
835