HD6432351 Datasheet, PDF(358/989 Page) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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HD6432351 Datasheet, PDF (358/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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Table 9-5 Port 2 Pin Functions (cont)

Pin

Selection Method and Pin Functions

P22/PO2/TIOCC3

The pin function is switched as shown below according to the combination of

the TPU channel 3 setting by bits MD3 to MD0 in TMDR3, bits IOC3 to IOC0 in

TIOR3L, bits CCLR2 to CCLR0 in TCR3, bit NDER2 in NDERL, and bit

P22DDR.

TPU Channel

3 Setting

Table Below (1)

Table Below (2)

P22DDR

â

0

1

1

NDER2

â

â

0

1

Pin function

TIOCC3 output

P22

input

P22

output

PO2

output

TIOCC3 input *1

Note: 1. TIOCC3 input when MD3 to MD0 = B'0000, and IOC3 to IOC0 =

B'10xx.

TPU Channel

3 Setting

(2)

(1)

(2)

(1)

(1)

(2)

MD3 to MD0

B'0000

B'001x B'0010

B'0011

IOC3 to IOC0

B'0000

B'0100

B'1xxx

B'0001 to

B'0011

B'0101 to

B'0111

B'xx00

Other than B'xx00

CCLR2 to

CCLR0

â

â

â

â

Other B'101

than

B'101

Output

function

â

Output

â

PWM PWM

â

compare

mode 1 mode 2

output

output*2 output

x: Donât care

Note: 2. TIOCD3 output is disabled.

When BFA = 1 or BFB = 1 in TMDR3, output is disabled and setting

(2) applies.

338

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