HD6432351 Datasheet, PDF (522/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

11.2.7 Port 1 Data Direction Register (P1DDR)
Bit
:
Initial value :
R/W
:
7
6
5
4
3
2
1
0
P17DDR P16DDR P15DDR P14DDR P13DDR P12DDR P11DDR P10DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 1.
Port 1 is multiplexed with pins PO15 to PO8. Bits corresponding to pins used for PPG output must
be set to 1. For further information about P1DDR, see section 9.2, Port 1.
11.2.8 Port 2 Data Direction Register (P2DDR)
Bit
:
Initial value :
R/W
:
7
6
5
4
3
2
1
0
P27DDR P26DDR P25DDR P24DDR P23DDR P22DDR P21DDR P20DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2.
Port 2 is multiplexed with pins PO7 to PO0. Bits corresponding to pins used for PPG output must
be set to 1. For further information about P2DDR, see section 9.3, Port 2.
502