HD6432351 Datasheet, PDF (928/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

TMDR2—Timer Mode Register 2
Bit
:
7
6
5
—
—
—
Initial value :
1
1
0
Read/Write : —
—
—
H'FFF1
4
3
2
1
0
—
MD3 MD2 MD1 MD0
0
0
0
0
0
—
R/W R/W R/W R/W
TPU2
Mode
0 0 0 0 Normal operation
1 Reserved
1 0 PWM mode 1
1 PWM mode 2
1 0 0 Phase counting mode 1
1 Phase counting mode 2
1 0 Phase counting mode 3
1 Phase counting mode 4
1 * * *—
* : Don’t care
Notes: MD3 is a reserved bit. In a write, it
should always be written with 0.
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