HD6432351 Datasheet, PDF (420/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Table 10-1 TPU Functions (cont)
Item
Channel 0 Channel 1 Channel 2 Channel 3 Channel 4 Channel 5
DMAC TGR0A
TGR1A
TGR2A
TGR3A
TGR4A
TGR5A
activation compare
compare
compare
compare
compare
compare
match or
match or
match or
match or
match or
match or
input capture input capture input capture input capture input capture input capture
DTC
TGR
TGR
TGR
TGR
TGR
TGR
activation compare
compare
compare
compare
compare
compare
match or
match or
match or
match or
match or
match or
input capture input capture input capture input capture input capture input capture
A/D
TGR0A
TGR1A
TGR2A
TGR3A
TGR4A
TGR5A
converter compare
compare
compare
compare
compare
compare
trigger match or
match or
match or
match or
match or
match or
input capture input capture input capture input capture input capture input capture
PPG
TGR0A/
TGR1A/
TGR2A/
TGR3A/
—
—
trigger TGR0B
TGR1B
TGR2B
TGR3B
compare
compare
compare
compare
match or
match or
match or
match or
input capture input capture input capture input capture
Interrupt
sources
5 sources 4 sources 4 sources 5 sources 4 sources 4 sources
• Compare • Compare • Compare • Compare • Compare • Compare
match or
match or
match or
match or
match or
match or
input
input
input
input
input
input
capture 0A capture 1A capture 2A capture 3A capture 4A capture 5A
• Compare • Compare • Compare • Compare • Compare • Compare
match or
match or
match or
match or
match or
match or
input
input
input
input
input
input
capture 0B capture 1B capture 2B capture 3B capture 4B capture 5B
• Compare • Overflow • Overflow • Compare • Overflow • Overflow
match or _{• Underflow • Underflow}
input
match or _{• Underflow • Underflow}
input
capture 0C
capture 3C
• Compare
match or
input
capture 0D
• Compare
match or
input
capture 3D
• Overflow
Legend
— : Not possible
• Overflow
400