HD6432351 Datasheet, PDF (295/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

7.5.16 Forced Termination of DMAC Operation
If the DTE bit for the channel currently operating is cleared to 0, the DMAC stops on completion
of the 1-byte or 1-word transfer in progress. DMAC operation resumes when the DTE bit is set to
1 again.
In full address mode, the same applies to the DTME bit.
Figure 7-37 shows the procedure for forcibly terminating DMAC operation by software.
Forced termination
of DMAC
Clear DTE bit to 0
[1]
[1] Clear the DTE bit in DMABCRL to 0.
If you want to prevent interrupt generation after
forced termination of DMAC operation, clear the
DTIE bit to 0 at the same time.
Forced termination
Figure 7-37 Example of Procedure for Forcibly Terminating DMAC Operation
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