|
HD6432351 Datasheet, PDF (641/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise | |||
|
◁ |
Section 15 A/D Converter
15.1 Overview
The H8S/2350 Series incorporates a successive approximation type 10-bit A/D converter that
allows up to eight analog input channels to be selected.
15.1.1 Features
A/D converter features are listed below
⢠10-bit resolution
⢠Eight input channels
⢠Settable analog conversion voltage range
 Conversion of analog voltages with the reference voltage pin (Vref) as the analog reference
voltage
⢠High-speed conversion
 Minimum conversion time: 6.7 µs per channel (at 20 MHz operation)
⢠Choice of single mode or scan mode
 Single mode: Single-channel A/D conversion
 Scan mode: Continuous A/D conversion on 1 to 4 channels
⢠Four data registers
 Conversion results are held in a 16-bit data register for each channel
⢠Sample and hold function
⢠Three kinds of conversion start
 Choice of software or timer conversion start trigger (TPU), or ADTRG pin
⢠A/D conversion end interrupt generation
 A/D conversion end interrupt (ADI) request can be generated at the end of A/D conversion
⢠Module stop mode can be set
 As the initial setting, A/D converter operation is halted. Register access is enabled by
exiting module stop mode.
621
|
▷ |