HD6432351 Datasheet, PDF (726/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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Port 1 to 6,
A to G (read)
Port 1 to 3, 5, 6,
A to G (write)
T₁
T₂
t_PRS t_PRH
t_PWD
Figure 21-22 I/O Port Input/Output Timing
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PO15 to PO0
t_POD
Figure 21-23 PPG Output Timing
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Output compare
output*
Input capture
input*
t_TOCD
t_TICS
Note: * TIOCA0 to TIOCA5, TIOCB0 to TIOCB5, TIOCC0, TIOCC3, TIOCD0, TIOCD3
Figure 21-24 TPU Input/Output Timing
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