HD6432351 Datasheet, PDF (837/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

P6DDR—Port 6 Data Direction Register
H'FEB5
Port 6
Bit
:
7
6
5
4
3
2
1
0
P67DDR P66DDR P65DDR P64DDR P63DDR P62DDR P61DDR P60DDR
Initial value :
0
0
0
0
0
0
0
0
Read/Write :
W
W
W
W
W
W
W
W
Specify input or output for individual port 6 pins
PADDR—Port A Data Direction Register
H'FEB9
Port A
Bit
Initial value
Read/Write
:
7
6
5
4
3
2
1
0
PA7DDR PA6DDR PA5DDR PA4DDR PA3DDR PA2DDR PA1DDR PA0DDR
:
0
0
0
0
0
0
0
0
:
W
W
W
W
W
W
W
W
Specify input or output for individual port A pins
PBDDR—Port B Data Direction Register
H'FEBA
Port B
[H8S/2351 Only]
Bit
Initial value
Read/Write
:
7
6
5
4
3
2
1
0
PB7DDR PB6DDR PB5DDR PB4DDR PB3DDR PB2DDR PB1DDR PB0DDR
:
0
0
0
0
0
0
0
0
:
W
W
W
W
W
W
W
W
Specify input or output for individual port B pins
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