HD6432351 Datasheet, PDF (391/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Port C Data Register (PCDR) [H8S/2351 Only]
Bit
:
Initial value :
R/W
:
7
PC7DR
0
R/W
6
5
4
3
2
PC6DR PC5DR PC4DR PC3DR PC2DR
0
0
0
0
0
R/W R/W R/W R/W R/W
1
0
PC1DR PC0DR
0
0
R/W R/W
PCDR is an 8-bit readable/writable register that stores output data for the port C pins (PC₇ to PC₀).
PCDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port C Register (PORTC) [H8S/2351 Only]
Bit
:
7
6
5
4
3
2
1
0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Initial value :
—*
—*
—*
—*
—*
—*
—*
—*
R/W
:
R
R
R
R
R
R
R
R
Note: * Determined by state of pins PC7 to PC0.
PORTC is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port C pins (PC₇ to PC₀) must always be performed on PCDR.
If a port C read is performed while PCDDR bits are set to 1, the PCDR values are read. If a port C
read is performed while PCDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTC contents are determined by the pin
states, as PCDDR and PCDR are initialized. PORTC retains its prior state after a manual reset, and
in software standby mode.
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