HD6432351 Datasheet, PDF (521/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Bit 1—Group 1 Non-Overlap (G1NOV): Selects normal or non-overlapping operation for pulse
output group 1 (pins PO7 to PO4).
Bit 1
G1NOV
0
1
Description
Normal operation in pulse output group 1 (output values updated at compare match A
in the selected TPU channel)
(Initial value)
Non-overlapping operation in pulse output group 1 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Bit 0—Group 0 Non-Overlap (G0NOV): Selects normal or non-overlapping operation for pulse
output group 0 (pins PO3 to PO0).
Bit 0
G0NOV
0
1
Description
Normal operation in pulse output group 0 (output values updated at compare match A
in the selected TPU channel)
(Initial value)
Non-overlapping operation in pulse output group 0 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
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