HD6432351 Datasheet, PDF (966/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

*1
*2
PF₃
*3
Reset
R
Q
D
PF3DDR
C
WDDRF
Reset
R
Q
D
PF3DR
C
WDRF
RDRF
Bus controller
LWR output
RPORF
Legend
WDDRF : Write to PFDDR
WDRF : Write to PFDR
RDRF : Read PFDR
RPORF : Read port F
Notes: 1. H8S/2351: Mode 1/2/4/5/6
H8S/2350: Mode 1/4/5
2. H8S/2351: Mode 3/7
H8S/2350: 8-bit bus mode
3. H8S/2351: Mode 1/2/4/5/6
H8S/2350: 8-bit bus mode
Figure C-12 (d) Port F Block Diagram (Pin PF₃)
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